Design-Reuse

STMicroelectronics Makes 45nm CMOS Process Available Through CMP

Introduction strengthens STMicroelectronics’ position as a semiconductor technology leader Used by universities, research labs and companies for next generation System-on-Chip and allows CMP to ...
Silicon Semiconductor

Preventing liquid cross-contamination in semiconductor manufacturing

Producing high-purity wafers via the CMP process is a critical application and the halting of harmful slurry-DIW cross-contamination and back-flow can be optimised with the Malema Interconnect ...
EDN

How fabrication services can aid CMOS and MEMS use in biomedical designs

Universities need to have access to technology for teaching their students who can be trained at least on the most up to date technology processes. Research Laboratories usually need to have high ...
AZOM

Using 3D Optical Profiling for Full-Field Hotspot Detection

Chemical mechanical polishing (CMP) – also known as planarization – has long been the most commonly employed technique for smoothing and flattening wafer surfaces during the fabrication of ...
EDN

STMicroelectronics Makes 28nm CMOS Process Available Through CMP

“There has been a great interest in designing ICs in these processes, with about 300 projects having been designed in 90nm (phased out in 2009), and 200 already in 65nm,” said Bernard Courtois, ...
Design-Reuse

STMicroelectronics Makes 28nm CMOS Process Available Through CMP

Geneva, June 15, 2011 - STMicroelectronics (NYSE: STM) and CMP (Circuits Multi Projets®) today announced that the CMOS 28nm process from STMicroelectronics is now available for prototyping to ...
Yahoo

STMicroelectronics in Cooperation With Soitec Makes 28nm FD-SOI CMOS Process Available Through CMP

GENEVA and GRENOBLE, FRANCE--(Marketwire - Oct 18, 2012) - STMicroelectronics (NYSE: STM), Soitec (Euronext) and CMP (Circuits Multi Projets®) today announced that ST's CMOS 28nm Fully Depleted ...