EDN

Detect wire breaks with unusual CMOS gate circuit

CMOS devices have large input impedance with input currents on the order of 0.01nA. Adding feedback circuitry can result in a latch-like device that can be used to store bits, and also operate in a ...
Electronic Design

Layout-Dependent Modeling Boosts CMOS Gate Density

A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...
EDN

CMOS FET and IGBT Single Gate Driver

The UCC27532 is a single-channel, high-speed, gate driver capable of effectively driving MOSFET and IGBT power switches by up to 2.5-A source and 5-A sink (asymmetrical drive) peak current. Strong ...
Design-Reuse

Low Power Universal Gates for Approximate Computing

Density and speed of IC’s have increased exponentially for several decades, following a trend described by Moore’s Law. While it is accepted that this exponential improvement trend will end, it is ...